Comparison of PWM Techniques Controlling Three-Level T-NPC Inverter under Different DC-link Capacitor Voltage Conditions
- Faculty of Electrical and Electronics Engineering - Ho Chi Minh City University of Technology - Vietnam National University Ho Chi Minh City (HCMUT-VNU HCM).
- Faculty of Electrical and Electronics - Ho Chi Minh City University of Industry and Trade.
Abstract
This paper presents a comparative study of the performance of popular PWM control techniques for a 3-level T-NPC inverter. The investigated methods include: sinusoidal carrier-based PWM techniques (including IPD-SPWM and POD-SPWM) and reduced-common-mode voltage space vector PWM technique (RCMV-SVPWM). The techniques are firstly analyzed theoretically and then implemented in MATLAB/Simulink simulation model and on experimental hardware which utilizes a TMS320F28377 DSP card. Under fully balanced DC-link voltage condition, the methods are compared according to the following criteria: the harmonic distortion factors (THD, WTHD) of output voltages and currents, the amplitude, frequency spectrum distribution, and RMS value of common-mode voltage. Under the free oscillation of the voltage on DC-link capacitors, the comparison criteria include the voltage ripple on the capacitor and the RMS value of neutral point current. The simulation and experimental results under normal operating conditions show that the RCMV-SVPWM technique has more advantages than the other two techniques in terms of DC voltage utilization, CMV reduction, and switching loss minimization. For the condition of DC-link capacitor voltage fluctuation, the simulation results show that the POD-SPWM method provides better response through lower DC-link capacitor voltage ripple and smaller RMS values of neutral point current.